T2080NXE8MQLB View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
T2080NXE8MQLB Datasheet PDF : 186 Pages
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Electrical characteristics
Table 63.
PCI Express 2.0 (5 GT/s)
1.35 V)1 (continued)
differential
transmitter
output
DC
specifications
(XVDD
=
Parameter
Symbol
Min Typical Max Units
Notes
DC differential transmitter ZTX-DIFF-DC
impedance
80 100
120 Ω
Transmitter DC differential mode low
impedance
Transmitter DC
Impedance
ZTX-DC
40 50
60
Ω
Required transmitter D+ as well as D- DC
impedance during all states
Notes:
1. For recommended operating conditions, see Table 3.
This table defines the PCI Express 3.0 (8 GT/s) DC specifications for the differential
output at all transmitters. The parameters are specified at the component pins.
Table 64.
PCI Express
1.35 V )3
3.0
(8
GT/s)
differential
transmitter
output
DC
specifications
(XVDD
=
Parameter
Symbol
Min Typical Max Units
Notes
Full swing transmitter
voltage with no TX Eq
VTX-FS-NO-EQ
800 -
1300 mVp-p See Note 1.
Reduced swing
transmitter voltage with
no TX Eq
VTX-RS-NO-EQ
400 -
1300 mV
See Note 1.
De-emphasized
VTX-DE-RATIO-3.5dB 3.0
3.5
differential output voltage
(ratio)
4.0 dB
-
De-emphasized
VTX-DE-RATIO-6.0dB 5.5
6.0
differential output voltage
(ratio)
6.5 dB
-
Minimum swing during
EIEOS for full swing
VTX-EIEOS-FS
250 -
-
mVp-p See Note 2
Minimum swing during
VTX-EIEOS-RS
EIEOS for reduced swing
232 -
-
mVp-p See Note 2
DC differential transmitter ZTX-DIFF-DC
impedance
80 100
120 Ω
Transmitter DC differential mode low
impedance
Transmitter DC
Impedance
ZTX-DC
40 50
60 Ω
Required transmitter D+ as well as D- DC
impedance during all states
Notes:
1. Voltage measurements for VTX-FS-NO-EQ and VTX-RS-NO-EQ are made using the 64-zeroes/64-ones pattern in the compliance
pattern.
2. Voltage limits comprehend both full swing and reduced swing modes. The transmitter must reject any changes that would
violate this specification. The maximum level is covered in the VTX-FS-NO-EQ measurement which represents the maximum
peak voltage the transmitter can drive. The VTX-EIEOS-FS and VTX-EIEOS-RS voltage limits are imposed to guarantee the EIEOS
threshold of 175 mVP-P at the receiver pin. This parameter is measured using the actual EIEOS pattern that is part of the
compliance pattern and then removing the ISI contribution of the breakout channel.
3. For recommended operating conditions, see Table 3.
QorIQ T2080 Data Sheet, Rev. 3, 03/2018
NXP Semiconductors
109
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