Electrical characteristics
Table 14. Spread-spectrum clock source recommendations1 (continued)
Parameter
Min
Max
Unit
Notes
Notes:
1. At recommended operating conditions with OVDD = 1.8 V, see Table 3.
2. SYSCLK frequencies that result from frequency spreading and the resulting core frequency must meet the minimum and
maximum specifications given in Table 13.
3. Maximum spread-spectrum frequency may not result in exceeding any maximum operating frequency of the device.
CAUTION
The processor's minimum and maximum SYSCLK and core/
platform/DDR frequencies must not be exceeded regardless of
the type of clock source. Therefore, systems in which the
processor is operated at its maximum rated core/platform/DDR
frequency should avoid violating the stated limits by using
down-spreading only.
3.6.3 Real-time clock timing
The real-time clock timing (RTC) input is sampled by the platform clock. The output of
the sampling latch is then used as an input to the counters of the MPIC and the time base
unit of the core; there is no need for jitter specification. The minimum period of the RTC
signal should be greater than or equal to 16x the period of the platform clock with a 50%
duty cycle. There is no minimum RTC frequency; RTC may be grounded if not needed.
3.6.4 Gigabit Ethernet reference clock timing
This table provides the Ethernet gigabit reference clock DC specifications.
Table 15. ECn_GTX_CLK125 DC electrical characteristics1
Parameter
Input high
voltage
Input low
voltage
Input
capacitance
Input current
(LVIN = 0 V or
LVIN = LVDD)
Notes:
Symbol
VIH
VIL
CIN
IIN
Min
1.7
—
—
—
Typical
—
—
—
—
Max
—
0.7
6
± 50
Unit
V
V
pF
μA
Notes
2
2
—
3
QorIQ T2080 Data Sheet, Rev. 3, 03/2018
NXP Semiconductors
59