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DHQ1ECCSECETS1SR1WH View Datasheet(PDF) - Intel

Part Name
Description
Manufacturer
DHQ1ECCSECETS1SR1WH
Intel
Intel 
DHQ1ECCSECETS1SR1WH Datasheet PDF : 921 Pages
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Intel® Quark SoC X1000—Legacy Bridge
21.5.3.4
Power Management 1 Timer Register (PM1T)—Offset 8h
Access Method
Type: I/O Register
(Size: 32 bits)
PM1T: [PM1BLK] + 8h
PM1BLK Type: PCI Configuration Register (Size: 32 bits)
PM1BLK Reference: [B:0, D:31, F:0] + 48h
Default: 00000000h
31
28
24
20
16
12
8
4
0
00000000000000000000000000000000
Bit
Default &
Range Access
Description
31:24
0b
RO
Reserved (RSV): Reserved.
23:0
0b
RO
Timer Value (VAL): Returns the running count of the PM timer. This counter runs off a
3.579545 MHz clock (derived from 14.31818 MHz divided by 4). It is reset on a platform
reset, and runs continuously in S0. Any time bit 22 goes from 1 to 0, PM1S.TO is set
Intel® Quark SoC X1000
DS
830
October 2013
Document Number: 329676-001US

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