DSPIC33EV64GM102-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

DSPIC33EV64GM102-I/SO

16-Bit, 5V Digital Signal Controllers with PWM, SENT, Op Amps and Advanced Analog Features

Microchip Technology 

dsPIC33EVXXXGM00X/10X FAMILY

REGISTER 7-2: CORCON: CORE CONTROL REGISTER(1)

R/W-0

VAR

bit 15

U-0

R/W-0

R/W-0

R/W-0

R-0

—

US1

US0

EDT

DL2

R-0

R-0

DL1

DL0

bit 8

R/W-0

R/W-0

R/W-1

R/W-0

R/C-0

R-0

SATA

SATB

SATDW

ACCSAT

IPL3(2)

SFA

bit 7

R/W-0

RND

R/W-0

IF

bit 0

Legend:

R = Readable bit

-n = Value at POR

C = Clearable bit

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

bit 3

VAR: Variable Exception Processing Latency Control bit

1 = Variable exception processing latency is enabled

0 = Fixed exception processing latency is enabled

IPL3: CPU Interrupt Priority Level Status bit 3(2)

1 = CPU Interrupt Priority Level is greater than 7

0 = CPU Interrupt Priority Level is 7 or less

Note 1: For complete register details, see Register 3-2.

2: The IPL3 bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU Interrupt Priority Level.

DS70005144E-page 102

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