DSPIC33EV64GM102-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

DSPIC33EV64GM102-I/SO

16-Bit, 5V Digital Signal Controllers with PWM, SENT, Op Amps and Advanced Analog Features

Microchip Technology 

dsPIC33EVXXXGM00X/10X FAMILY

8.0 DIRECT MEMORY ACCESS

(DMA)

Note 1: This data sheet summarizes the features

of the dsPIC33EVXXXGM00X/10X family

of devices. It is not intended to be a

comprehensive reference source. To

complement the information in this data

sheet, refer to “Direct Memory Access

(DMA)” (DS70348) in the “dsPIC33/

PIC24 Family Reference Manual”, which

is available from the Microchip web site

(www.microchip.com).

2: Some registers and associated bits

described in this section may not be

available on all devices. Refer to

Section 4.0 “Memory Organization” in

this data sheet for device-specific register

and bit information.

The DMA Controller transfers data between Peripheral

Data registers and Data Space SRAM. For the

simplified DMA block diagram, refer to Figure 8-1.

In addition, DMA can access the entire data memory

space. The data memory bus arbiter is utilized when

either the CPU or DMA attempts to access SRAM,

resulting in potential DMA or CPU stalls.

The DMA Controller supports 4 independent channels.

Each channel can be configured for transfers to or from

selected peripherals. The peripherals supported by the

DMA Controller include:

• CAN

• Analog-to-Digital Converter (ADC)

• Serial Peripheral Interface (SPI)

• UART

• Input Capture

• Output Compare

Refer to Table 8-1 for a complete list of supported

peripherals.

FIGURE 8-1:

PERIPHERAL TO DMA CONTROLLER

PERIPHERAL

DMA

Data Memory

Arbiter

(see Figure 4-13)

SRAM

 2013-2016 Microchip Technology Inc.

DS70005144E-page 109

Share Link: