DSPIC33EV64GM102-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

DSPIC33EV64GM102-I/SO

16-Bit, 5V Digital Signal Controllers with PWM, SENT, Op Amps and Advanced Analog Features

Microchip Technology 

dsPIC33EVXXXGM00X/10X FAMILY

REGISTER 7-7:

U-0

—

bit 15

INTTREG: INTERRUPT CONTROL AND STATUS REGISTER

U-0

U-0

U-0

U-0

R-0

R-0

—

—

—

—

ILR3

ILR2

R-0

ILR1

bit 8

R-0

VECNUM7

bit 7

R-0

R-0

R-0

R-0

VECNUM6 VECNUM5 VECNUM4 VECNUM3

R-0

VECNUM2

R-0

VECNUM1

R-0

VECNUM0

bit 0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-11

bit 10-8

bit 7-0

Unimplemented: Read as ‘0’

ILR<3:0>: New CPU Interrupt Priority Level bits

1111 = CPU Interrupt Priority Level is 15

•

•

•

0001 = CPU Interrupt Priority Level is 1

0000 = CPU Interrupt Priority Level is 0

VECNUM<7:0>: Vector Number of Pending Interrupt bits

11111111 = 255, Reserved; do not use

•

•

•

00001001 = 9, Input Capture 1 (IC1)

00001000 = 8, External Interrupt 0 (INT0)

00000111 = 7, Reserved; do not use

00000110 = 6, Generic soft error trap

00000101 = 5, DMAC error trap

00000100 = 4, Math error trap

00000011 = 3, Stack error trap

00000010 = 2, Generic hard trap

00000001 = 1, Address error trap

00000000 = 0, Oscillator fail trap

DS70005144E-page 108

 2013-2016 Microchip Technology Inc.

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