dsPIC33EVXXXGM00X/10X FAMILY
REGISTER 7-5:
R/W-0
DMT
bit 15
INTCON3: INTERRUPT CONTROL REGISTER 3
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
U-0
U-0
R/W-0
R/W-0
U-0
U-0
—
—
DAE
DOOVR
—
—
bit 7
U-0
U-0
—
—
bit 8
U-0
U-0
—
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14-6
bit 5
bit 4
bit 3-0
DMT: Deadman Timer (Soft) Trap Status bit
1 = Deadman Timer trap has occurred
0 = Deadman Timer trap has not occurred
Unimplemented: Read as ‘0’
DAE: DMA Address Error Soft Trap Status bit
1 = DMA address error soft trap has occurred
0 = DMA address error soft trap has not occurred
DOOVR: DO Stack Overflow Soft Trap Status bit
1 = DO stack overflow soft trap has occurred
0 = DO stack overflow soft trap has not occurred
Unimplemented: Read as ‘0’
DS70005144E-page 106
2013-2016 Microchip Technology Inc.