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DHQ1ECCSECETS1SR1WH View Datasheet(PDF) - Intel

Part Name
Description
Manufacturer
DHQ1ECCSECETS1SR1WH
Intel
Intel 
DHQ1ECCSECETS1SR1WH Datasheet PDF : 921 Pages
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Legacy Bridge—Intel® Quark SoC X1000
Once a range is locked, the range can be unlocked only by a hard reset, which invokes
the BIOS and allows it to relock the RAM range.
21.10.3 Register Map
Figure 50.
See Chapter 5.0, “Register Access Methods” for additional information.
RTC Register Map
PCI Space
CPU
Core
PCI
CAM
(I/O)
PCI
ECAM
(Mem)
Bus 0
SPI0 F:0
SPI1 F:1
I2C*/GPIO F:2
SDIO/eMMC F:0
HSUART0 F:1
USB Device F:2
EHCI Host F:3
OCHI Host F:4
HSUART1 F:5
MAC0 F:6
MAC1 F:7
Host Bridge
D:0,F:0
RP0 F:0
RP0 F:1
Legacy PCI
Header
D:31,F:0
Legacy Bridge
D:31,F:0
Memory
Space
IO Space
Fixed IO
Registers
21.10.4
I/O Registers
The RTC internal registers and RAM are organized as two banks of 128 bytes each,
called the standard and extended banks.
October 2013
Document Number: 329676-001US
Intel® Quark SoC X1000
DS
879

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